Why choose PCBSourcing as HDI Supplier
1. Quotation for HDI PCB within 24 hours, urgent offer within 2 hours;
2. Rich experiences in HDI PCB back up Foxconn, proffesional suggestions from design stage in order to
avoid any impracticable design;
3. HDI PCB from small series to mass production are all acceptable;
4. Rich experience in HDI PCB production
Features of HDI PCB
1. Smaller vias and traces for higher route density and fewer layers
2. Micro-via patterns for routing channels, potential for fewer layers
3. Only practical way to design with multiple large BGAs having <0.8 mm pitch
4. Lowest cost for high density boards
5. HDI for improved signal and power integrity
6. Newer materials available of higher performance and lower costs, which are not suitable for standard or
sequential lamination
HDI PCB is the best alternative to high layer-countand expensive standard laminate or sequentially
laminated boards.
1. The trend is for higher pin-count and finer pin-pitch. The tipping point will occur when the >1500 pin
BGAs use a .8mm pitch.
The only way to effectively breakout and route multiple instances of these devices on a single board
will be with the smaller HDI feature sizes.
2. HDI PCB currently dominates the fabrication technology for handheld and consumer electronics.
For large board designs, it will continue to grow.
Stack-up of HDI PCB
HDI 1+N+1 for 4 & 6 layers HDI PCBs
HDI 2+N+2 for 6 & 8 layers HDI PCBs (Staggered via)

HDI 2+N+2 for 6 & 8 layers HDI PCBs (Staggered via-Copper filled via)
HDI Any-layer for 6 & 8 layers HDI PCB

For HDI PCB product show, please visit Cell Phone PCBS
Capability of HDI PCB
ITEM |
MASS PRODUCTION |
PROTOTYPE |
|
|
|
Layers |
Any Layer |
Any Layer |
|
|
|
Base Material |
FR4,Halogen Free,RCC,Ulta Thin Core |
|
|
|
Surface Treatment |
ENIG+OSP,ENIG,Carbon+OSP,Immersion Tin,OSP |
|
|
|
Min. Line/Spacing |
2.5/2.5mil |
2.0/2.0mil |
|
|
|
Critical Line Width Tolerance |
2.5mil±15% |
2.0mil±10% |
|
|
|
Min.Microvia Drill Size (Laser) |
3mil |
3mil |
|
|
|
Min.Capture/Target Pad Size |
10mil |
8mil |
|
|
|
Min PTH & Buried Drill Bit |
0.20mm |
0.20mm |
|
|
|
Min. Annular Ring |
3.5mil |
3mil |
|
|
|
Max. PTH Aspect Ratio |
`10:1 |
`12:1 |
|
|
|
Max. Microvia Aspect Ratio |
0.8:1 |
0.8:1 |
|
|
|
Impedance Control |
±10% |
±7% |
|
|
|
Solder Mask Clearance |
1.5mil |
1.5mil |
|
|
|
Solder Mask Web |
2.5mil |
2.5mil |
|
|
|
Min. BGA/CSP pitch |
0.4mm |
0.4mm |
|
|
|
Registration from Layer to Layer |
2mil |
2mil |
|
|
|
Min. dielectric thickness |
2mil |
1.8mil |
|
|
|
Max Board Thickness |
1.8mil |
2.0mil |
|
|
|
PTH Hole Tolerance |
±3mil |
±2mil |
|
|
|
Min. Outline Tolerance |
±0.1mm |
±0.1mm |
|
|
|
Min. Core Thickness |
3mil |
3mil |
|
|
|
Hole Structure |
Stagger Vias,Stacked Via,Skip Via,Stepped Via,ELIC |
|
|
|
Other Technology |
Carbon Jumper,LDI,DLD,Copper Filled Via,VOP |